NE555 Bloc Diagram
Between the supply voltage VCC (+) and the ground GND (-) is a voltage divider consisting of three identical resistors which, when connected not from the outside, the two reference voltages ¹ / 3 VCC and ² / 3 VCC supplies. The latter is at the terminal pin Control Voltage available. The block diagram and schematic that area is highlighted in green. Two comparators are each connected to one of the reference voltages, while the other two inputs of which are fed directly to the terminals of trigger or threshold. The block diagram in yellow and orange. A flip-flop, deposited in the color purple, stores the state of the timer and is controlled by the two comparators. Via the reset terminal overrides the other two inputs, the flip-flop (and therefore the entire timer device) be reset at any time. At the output of flip-flop followed by an output stage with totem-pole output that can be loaded at the port output with up to 200 mA. Shown in the color pink.
Parallel to the output stage of a transistor is connected, the collector is located on the discharge port. The transistor in the circuit diagram is a light blue background, always energized when the output is low level.
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NE555NE555 je integrovaný obvod používaný nejčastěji jako časovač nebo generátor různých pravoúhlých signálů. Byl navržen v roce 1970 švýcarským inženýrem Hansem R. Camenzindem. Na trh byl uveden v roce 1971 firmou Signetics. Uvádí se, že označení 555 je odvozeno od tří rezistorů s hodnotou 5 kΩ, které jsou v tomto IO použity. Sám Hans Camenzind však uvádí, že se jedná o náhodně vybrané číslo. .. pokračovat ve čtení